Device Concepts, Simulations and Compact Models

The following is a list of related publications and sub-topics that the SEEDER group investigates in the area of Device Concepts, Simulations and Compact Models:

  • Exploring Physics in Novel Material Systems
    • Spintronic Device Concepts and Physics–Skyrmions, Topological Insulators (TI), Voltage-Controlled Magnetic Anisotropy (VCMA), Spin-orbit Torque (SOT), Spin-Transfer Torque (STT), Domain Wall Motion
      • X. Fong, Y. Kim, K. Yogendra, D. Fan, A. Sengupta, A. Raghunathan, and K. Roy, “Spin-transfer torque devices for logic and memory applications: prospects and perspectives,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems vol. 35, iss. 1, pp. 1-22, Jan. 2016, doi:10.1109/TCAD.2015.2481793 Invited Paper. [PDF]
      • K. Roy, D. Fan, X. Fong, Y. Kim, M. Sharad, S. Paul, S. Chatterjee, S. Bhunia, and S. Mukhopadhyay, “Exploring spin transfer torque devices for unconventional computing,” IEEE J. on Emerging and Selected Topics in Circuits and Systems (JETCAS) vol. 5, no. 1, pp. 5-16, Mar. 2015, doi:10.1109/JETCAS.2015.2405171. Invited Paper [PDF]
    • Ferroelectrics
      • Ferroelectric Domain Walls
      • Negative Capacitance Effect
    • Multiferroics
      • Single and Two Phase Multiferroic Structures
      • Tunnel Junctions
  • Simulation Methodologies and Frameworks
    • Object-Oriented MicroMagnetic Framework (OOMMF)
    • MuMax3
    • Fokker-Planck Based Framework
    • STT Magnetic RAM (MRAM)
      • X. Fong, S. K. Gupta, N. N. Mojumder, S. H. Choday, C. Augustine, and K. Roy, “KNACK: a hybrid mixed-mode simulator for evaluating different genres of spin-transfer torque MRAM bit-cells,” in Proc. of 2011 Int. Conf. on Simulation of Semicond. Processes and Dev. (SISPAD), Sep. 2011, pp. 51-54, doi:10.1109/SISPAD.2011.6035047 [PDF]
        • Non-equilibrium Green’s Function (NEGF) model of electronic transport
        • Landau-Lifshitz-Gilbert-Slonczewski (LLGS) model of magnetization dynamics
        • Nodal analysis of memory cell circuitry
  • Verilog-AMS Based Compact Models
    • SEEDER Spintronic Compact Model Library for Circuit-compatible Simulation (i.e., Verilog-AMS and HSPICE)
    • SEEDER RRAM Device Compact Model Library for Circuit-compatible Simulation (i.e., Verilog-AMS and HSPICE)
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