The SEEDER Group carries out research in the broad research area of scalable and energy efficient electronics. We are focused on two key research thrusts: (i) Scalable Energy Efficient Compute Hardware and (ii) Advanced Memories.

1. Scalable Energy Efficient Compute Hardware

The demand for more computational power has exploded in the era of artificial intelligence. The traditional Moore’s law downscaling of device geometry is insufficient to meet the growing demand for more computational power sustainably and economically.

To address this challenge, the SEEDER Group is very interested in algorithm-technology co-design of brain-inspired and quantum-inspired electronic systems that take advantage of emerging device technologies to implement compute hardware that far outperforms CMOS electronics in domain-specific applications. We explore device concepts, circuits, microarchitectures and system architectures, and algorithms to gain a holistic picture of the key research challenges. Research topics along this research thrust include:

  • Novel device concepts for brain-inspired and quantum-inspired computing
  • Design of hardware-friendly algorithms
  • Hardware accelerator microarchitectures

2. Advanced Memories

Memory is an ubiquitous component of modern electronics. However, the von Neumann bottleneck and Memory Wall are significant roadblocks to improving energy efficiencies of electronics.

The SEEDER Group explores memory subsystems at every level of the design hierarchy, from device technology all the way up to the memory architecture, to find new possibilities for future electronic systems. Research topics along this research thrust include:

  • Device concepts for ultra-low power, high density non-volatile memories
  • Circuits and hardware architectures for functionalized memories (e.g. memories beyond data storage)

Our Methodologies and Approaches

We believe a broad understanding of the design challenges across the abstraction layers in the design hierarchy–from material physics all the way up to the hardware architecture–is needed. By studying the interactions between various layers of the design stack, we achieve physical design of novel electronic circuits and systems that maximally leverage new device technologies. The following is a summary listing (not comprehensive) of the research activities that the SEEDER group is actively involved in:

  1. Device Concepts, Simulations and Compact Modeling
  2. Co-Design and Co-Optimization Methodologies
  3. Microarchitectures, System Architectures and Algorithms
Skip to toolbar